two-level cache architecture
51Page Size Extension — In computing, Page Size Extension (PSE) refers to a feature of x86 processors that allows for pages larger than the traditional 4 KiB size. It was introduced in the original Pentium processor, but it was only publicly documented by Intel with the …
52NORD-10 — Two adjacent NORD 10/S systems NORD 10 was a medium sized general purpose 16 bit minicomputer designed for multilingual time sharing applications and for real time multiprogram systems, produced by Norsk Data. It was introduced in 1973. The later …
53Itanium — 2 processor Produced From mid 2001 to present Common manufacturer(s) Intel Max. CPU c …
54List of Intel microprocessors — For a list of Intel s microcontrollers, see List of common microcontrollers#Intel. This generational and chronological list of Intel microprocessors attempts to present all of Intel s processors from the pioneering 4 bit 4004 (1971) to the… …
55Oracle Database — Developer(s) Oracle Corporation Development status Active Written in …
56Microarchitecture — Computer organization redirects here. For organizations that make computers, see List of computer system manufacturers. For one classification of computer architectures, see Flynn s taxonomy. For another classification of instruction set… …
57Multi-core processor — Diagram of a generic dual core processor, with CPU local level 1 caches, and a shared, on die level 2 cache …
58Parallel computing — Programming paradigms Agent oriented Automata based Component based Flow based Pipelined Concatenative Concurrent computing …
59computer science — computer scientist. the science that deals with the theory and methods of processing information in digital computers, the design of computer hardware and software, and the applications of computers. [1970 75] * * * Study of computers, their… …
60Simultaneous multithreading — Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple independent threads of execution to better utilize the resources… …
