instruction-set architecture
1Instruction Set Architecture — Eine Befehlssatzarchitektur (engl. Instruction Set Architecture, kurz: ISA) ist – vereinfacht gesagt – die formale Spezifikation bestimmter Verhaltensweisen eines Prozessors aus Sicht seines Programmierers, auf die sich dieser bei der… …
2Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… …
3Instruction set — Der Befehlssatz (englisch: instruction set, weshalb in der deutschen Sprache der Begriff Instruktion synonym für Befehl verwendet wird) bezeichnet in der Informatik die Menge der Maschinenbefehle eines Mikroprozessors. Der Umfang des… …
4Instruction set matrix — In computer architecture, an instruction set matrix is a group of elements organized in columns and rows which refer to multiple instruction formats.Some computer architectures support multiple instruction formats. For example, certain versions… …
5Instruction set simulator — An instruction set simulator (ISS) is a simulation model, usually coded in a high level programming language, which mimics the behavior of a mainframe or microprocessor by reading instructions and maintaining internal variables which represent… …
6Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… …
7Complex instruction set computer — A complex instruction set computer (CISC, pronounced like sisk ) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low level operations, such as a load from memory, an arithmetic operation, and a …
8One instruction set computer — Computer science portal A one instruction set computer (OISC), sometimes called an ultimate reduced instruction set computer (URISC), is an abstract machine that uses only one instruction – obviating the need for a machine language opcode …
9Architecture De Processeur — Une architecture externe de processeur[1],[2] ou architecture de jeu d instructions[3] (ISA, de l anglais instruction set architecture), ou tout simplement architecture (de processeur) …
10Architecture des processeurs — Architecture de processeur Une architecture externe de processeur[1],[2] ou architecture de jeu d instructions[3] (ISA, de l anglais instruction set architecture), ou tout simplement architecture (de processeur) …
