instruction stack
11Burroughs large systems instruction set — The B5000 instruction set is the set of valid operations for the Burroughs large systems including the current (as of 2006) Unisys Clearpath/MCP systems. These unique machines have a distinctive design and instruction set. Each word of data is… …
12Orthogonal instruction set — is a term used in computer engineering. A computer s instruction set is said to be orthogonal if any instruction can use data of any type via any addressing mode. The word orthogonal, which means right angle in this context, implies that it is… …
13MMX (instruction set) — Pentium with MMX MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced in 1996 with their P5 based Pentium line of microprocessors, designated as Pentium with MMX Technology .[1] …
14Jeu d'instruction x86 — Article détaillé : Jeu d instructions. Le jeu d instructions du x86 a subi de nombreux changements au cours du temps. La plupart d entre eux ne sont que des ajouts au jeu d instruction initial afin d apporter de nouvelles fonctionnalités.… …
15Jeu D'instruction X86 — Article détaillé : Jeu d instructions. Le jeu d instructions du x86 a subi de nombreux changements au cours du temps. La plupart d entre eux ne sont que des ajouts au jeu d instruction initial afin d apporter de nouvelles fonctionnalités.… …
16Extended Instruction Pointer — Als Register bezeichnet man in der Digital oder Computertechnik Speicherbereiche, die innerhalb eines Prozessors direkt mit der eigentlichen Recheneinheit verbunden sind und die unmittelbaren Operanden und Ergebnisse aller Berechnungen aufnehmen …
17Minimal instruction set computer — (MISC) is a processor architecture with a very small number of basic operations and corresponding opcodes. Such instruction sets are commonly stack based rather than register based to reduce the size of operand specifiers. Such a stack machine… …
18Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… …
19Explicitly Parallel Instruction Computing — EPIC bezeichnet eine Eigenschaft einer Befehlssatzarchitektur (englisch Instruction Set Architecture, kurz ISA) und der Verarbeitungsstruktur einer Familie von Mikroprozessoren, z. B. Itanium. Bei der Programmierung von EPIC CPUs wird… …
20Visual Instruction Set — Visual Instruction Set, or VIS, is a SIMD instruction set for SPARC CPUs, implemented on all UltraSPARC and some SPARC64 processors.There are three versions of VIS. VIS 1.0 and VIS 2.0 are included in existing SPARC processor designs; VIS 3.0 is… …
