descriptor cache
1Unreal mode — Unreal mode, also big real mode, huge real mode, or flat real mode, is a variant of real mode (PE=0), in which one or more data segment registers have been loaded with 32 bit addresses and limits. Contrary to its name, it is not a separate… …
2LOADALL — is the common name for two different, undocumented machine instructions of Intel 80286 and Intel 80386 processors, which allow access to areas normally outside of the IA 32 API scope, like descriptor cache registers . The LOADALL for 286… …
3ESDC — Extra Segment Descriptor Cache …
4SSDC — • Stack Segment Descriptor Cache • System Safety Development Center ( > IEEE Standard Dictionary ) …
5ESDC — Extra Segment Descriptor Cache …
6SSDC — [1] Stack Segment Descriptor Cache [2] System Safety Development Center ( > IEEE Standard Dictionary ) …
7CSDC — abbr. Circuit Switched Digital Capability abbr. Code Segment Descriptor Cache (register) (CS, Intel, CPU) acronym Circuit Switched Digital Capability …
8DSDC — abbr. Data Segment Descriptor Cache (register) (DS, Intel, CPU) …
9ESDC — abbr. Extra Segment Descriptor Cache (register) (ES, Intel, CPU) …
10SSDC — abbr. Stack Segment Descriptor Cache (register) (SS, Intel, CPU) …
