saturating flip-flop
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Phase-locked loop — PLL redirects here. For other uses, see PLL (disambiguation). A phase locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input reference signal. It is an electronic… … Wikipedia
Emitter-coupled logic — Motorola ECL 10,000 basic gate circuit diagram[1] In electronics, emitter coupled logic (ECL), is a logic family that achieves high speed by using an overdriven BJT differential amplifier with single ended input, whose emitter current is limited… … Wikipedia