- pipelined processor
- конвейерный процессор, процессор с конвейерной обработкой данных
Большой англо-русский и русско-английский словарь. 2001.
Большой англо-русский и русско-английский словарь. 2001.
pipelined processor — srautinis procesorius statusas T sritis automatika atitikmenys: angl. pipeline processor; pipelined processor vok. Pipeline Prozessor, m rus. конвейерный процессор, m; процессор поточной обработки, m pranc. processeur à chaîne de production, m;… … Automatikos terminų žodynas
pipeline processor — srautinis procesorius statusas T sritis automatika atitikmenys: angl. pipeline processor; pipelined processor vok. Pipeline Prozessor, m rus. конвейерный процессор, m; процессор поточной обработки, m pranc. processeur à chaîne de production, m;… … Automatikos terminų žodynas
Vector processor — A vector processor, or array processor, is a CPU design where the instruction set includes operations that can perform mathematical operations on multiple data elements simultaneously. This is in contrast to a scalar processor which handles one… … Wikipedia
Digital signal processor — A Digital Signal Processor chip found in a guitar effects unit. A digital signal processor (DSP) is a specialized microprocessor with an architecture optimized for the fast operational needs of digital signal processing.[1] … Wikipedia
Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
Конвейер (процессоры)/Перевод — Пожалуйста, не удаляйте эту статью! В данный момент в ней идет работа по переводу основной английской версии для замены кошмарной русской. После завершения работы я объединю получившуюся статью с имеющейся русской версией. Простой пятиуровневый… … Википедия
Parallel computing — Programming paradigms Agent oriented Automata based Component based Flow based Pipelined Concatenative Concurrent computing … Wikipedia
Central processing unit — CPU redirects here. For other uses, see CPU (disambiguation). An Intel 80486DX2 CPU from above An Intel 80486DX2 from below … Wikipedia
Hazard (computer architecture) — Hazards are problems with the instruction pipeline in central processing unit (CPU) microarchitectures that potentially result in incorrect computation. There are typically three types of hazards: data hazards structural hazards control hazards… … Wikipedia
Communicating sequential processes — In computer science, Communicating Sequential Processes (CSP) is a formal language for describing patterns of interaction in concurrent systems.[1] It is a member of the family of mathematical theories of concurrency known as process algebras, or … Wikipedia
Decoupled architecture — In computer science, a decoupled architecture is a processor with out of order execution that separates the fetch and decode stages from the execute stage in a pipelined processor by using a buffer. The buffer s purpose is to partition the memory … Wikipedia