floating point register
21POWER1 — The POWER1 is a multi chip CPU developed and fabricated by IBM that implemented the POWER instruction set architecture (ISA). It was originally known as the “RISC System/6000 CPU” or when an abbreviated form, the “RS/6000 CPU” before introduction …
22Alpha 21064 — The 21064 microprocessor The 21064 microprocessor m …
23Cell (microprocessor) — Cell is a microprocessor architecture jointly developed by Sony Computer Entertainment, Toshiba, and IBM, an alliance known as STI . The architectural design and first implementation were carried out at the STI Design Center in Austin, Texas over …
24Alpha 21164 — Four 300 MHz Alpha 21164 microprocessors on a Cray T3E 600 processor board. The Alpha 21164, also known by its code name, EV5, is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction… …
25Loop nest optimization — (LNO) is a special case of loop transformation, dealing with nested loops, that allows large reductions in the cache bandwidth necessary for some common algorithms.Example: Matrix multiplyMany large mathematical operations on computers end up… …
26SSE2 — SSE2, Streaming SIMD Extensions 2, is one of the IA 32 SIMD (Single Instruction, Multiple Data) instruction sets. SSE2 was first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set,… …
27CPU cache — Cache memory redirects here. For the general use, see cache. A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the… …
28регистр с плавающей запятой — Регистр, доступный программам и используемый для хранения числа с плавающей точкой при выполнении арифметических операций [Источник] Тематики информационные технологии в целом EN floating point registerfloating registerfloating point register …
29SPARC — (from Scalable Processor Architecture) is a RISC microprocessor instruction set architecture originally designed in 1985 by Sun Microsystems.SPARC is a registered trademark of SPARC International, Inc., an organization established in 1989 to… …
30FPR — abbr. Fast Packet Relay (FPS, FPA) abbr. Floating Point Register (FPU) comp. abbr. Floating Point Register …
